The present disclosure relates to control of a battery device having a secondary battery, and more particularly to an electric power saving technology in control of charging and discharging of the secondary battery and a technology on productivity and expandability.
In recent years, the use of battery devices each having a battery pack of a secondary battery such as a lithium-ion battery inside is expanding to a wide range from portable equipment to batteries of electric vehicles and motor-operated bicycles.
One of performance capabilities required for such battery devices having a rechargeable secondary battery is low power consumption during charging/discharging of the battery. Also, in development of such battery devices, not only reduction in power consumption but also simplification and expandability of individual components are required.
For reduction in the power consumption of a control device in a battery pack, a technology is known where the power supply voltage used for analog circuits and logic circuits in the battery control device is reduced by lowering voltages supplied from an external secondary battery and an external charger, as disclosed in FIG. 1, etc. of Japanese Unexamined Patent Publication No. 2008-99370 (Patent Document 2), for example.
In a battery charging device in Japanese Unexamined Patent Publication No. 2002-233134 (Patent Document 1), a high-voltage PMOS transistor is used as a control switch for charging/discharging, and the voltage for driving this PMOS transistor is supplied from a battery back and a charger. However, since circuit elements in a battery device do not require a voltage as high as the battery voltage, a charge-pumping step-down circuit is provided in the battery device to reduce the power consumption of the inner circuits.
In the case of using a high-voltage NMOS transistor as a control switch for charging/discharging, it is required to boost the gate voltage of the NMOS transistor by a charge pump circuit like one shown in FIG. 1, etc. of Patent Document 2.